For the inspection of a defect present in a circuit pattern formed on wafers in a process of manufacturing a semiconductor device, there have been an optical inspection method and an inspection method using a SEM system.
In accordance with the optical inspection method, an image of a surface of a wafer is optically sensed and a defective portion is specified through the analysis of the image. This enables the defect inspection of the wafer surface to be performed at an extremely high speed.
In accordance with the SEM inspection method, a defect present in a circuit pattern is detected by scanning a surface of a wafer formed with a circuit pattern with an electron beam focused onto a spot and comparatively inspecting obtained SEM images. By using the SEM defect inspection of a circuit pattern, extremely small etching residues and pattern defects which are not more than the resolution of an optical microscope and electric defects such as faulty openings of extremely small connection holes can be detected. A technology for comparatively inspecting a pattern by using such a SEM system is disclosed in, e.g., a Japanese Laid-Open Patent No. H 05(1993)-258703.
Although the SEM inspection method has an advantage of allowing the detection of an electric defect over the optical inspection method, however, it has a disadvantage of an significantly lower inspection speed compared to the optical pattern inspection method.
In addition, the SEM inspection requires extremely high-speed obtention of the image of the circuit pattern to achieve a practical inspection speed so that it is necessary to form the image with a sufficient S/N ratio under short-term beam irradiation. Accordingly, it is necessary to adjust the current value of an electron beam for irradiating the wafer to about 10 nA or more, which is 100 times or more larger than the value of a beam current used in a normal scanning electron microscope.